1. Field of the Invention
The present invention relates to a semiconductor chip package structure and a method for manufacturing the same, and more particularly to a metal top stacking package structure and a method for manufacturing the same.
2. Description of Related Art
A multichip package (MCP) structure is a package with a plurality of semiconductor chips integrated into a single package structure, so that density of electronic components is enhanced to shorten the electrical connecting channels between electronic components. This package not only reduces the overall size of the multichip but also enhances overall performance.
In conventional multichip package structure, a plurality of chips are stacked vertically, alternately, stepwise or otherwise, and then each of the chips is electrically connected to a substrate through wire bonding. In multi-semiconductor chips stacking package technology, a stacking package technology of multichip with same size is a conventional package technology.
In the known technology, please refer to FIG. 1, a thermally and electrically enhanced stacked semiconductor package 1 is provided. The semiconductor package 1 mainly comprises a chip carrier 11 used for electrically connecting the semiconductor package 1 to the external components; at least one second chip 12 is mounted on and electrically connected to the chip carrier 11 by a flip chip type; a heat sink 13 mounded over the first chip 12 and electrical connecting with the chip carrier 11; a conductive layer 14 and at least one second chip 15 electrical connecting with the working surface of the chip carrier 11 by electrically connecting wires and mounded on the non-working surface; a plurality of wires 16 and an encapsulate material 17 are formed on the chip carrier 11 and encapsulating the first chip 12, the second chip 15, the heat sink 13 and the other components, and partly the chip carrier 11.
However, as shown in FIG. 1, the heat sink between the first chip and the second chip cannot achieve the ideal effect in heat dissipation and electromagnetic shielding; therefore, the heat energy during the working chips cannot effectively dissipate from the package, thereby reducing the chip stability and life time. Therefore, there is an urgent need for a metal top stacking package structure and a method for manufacturing the same, which provides heat dissipation and electromagnetic shielding by an optimum installation of the metal top; thereby enhancing electrical connection quality and life time of the chips.